How an AMD dual-die quad-core could have worked

The AMD64 direct connect architecture was designed to support up to eight sockets without any intervening core logic. That means single-core, dual-core and quad-core devices could scale out to a maximum of 8,16 and 32 cores respectively.

Some dual-socket Opteron motherboards connected only one processor to main memory. That primary CPU used one of its two HyperTransport links (HT) to connect to board peripherals. The other HT link connected to the secondary device. Because this chip didn’t have its own dedicated memory, access to the primary CPU’s RAM was via the HT bus. So if only one Opteron chip was going to be used it had to be installed in the primary socket.

Probably the best known implementation of this was the I will ZMAXd2. This company had managed to shoehorn a dual-socket Opteron motherboard into the space of a small form factor (SFF) sized case. Only two DIMM slots could be used as space was so very tight.

If the number of dual-core dies has been doubled, this increases the number of cores per package from two to four. So one package is a dual-die quad-core. Also, one package is now directly connected to memory. It should be evident that the individual packages are consolidated versions of the diagram above. If either of the dual-die packages replaced the pair above, the OS wouldn’t see anything that is different.

But this dual-die design now has four HT links per package, which can’t all be connected through the socket, as that interface can only support a maximum of three links. This problem is solved by linking the dual-core dies with a HT link through the package itself - thus bypassing the socket. This still leaves two HT links, as per design, to connect to the outside world. Four-socket Opteron setups and above would have one additional HT link per package.

But what about power and ground connections and the other miscellaneous signal interfaces? In Socket 940’s case, if the power and ground connections couldn’t all be shared, and multiplexing couldn’t do the same for the other miscellaneous interfaces, additional socket pins would be required.

A socket candidate
Socket F (1207) would have been a likely socket to use, as that has 267 more pins than Socket 940. This should have solved any pin count shortfall.

I said that AMD should have launched a dual-die quad-core in December 2006, when the company moved to 65 nanometre manufacturing technology. So the August 2006 Socket F launch would have paved the way for dual-die product.

But even if the company had to design brand new sockets for both DDR and DDR2 implementations, I believe that the availability window, when one factors in the quad-core delays, would have more than paid for the investment.

Hector speaks his mind
Someone who uses Hector as an alias (puking and suing Hector that is), wrote something in jest, which unfortunately for AMD makes for painful reading. He said:

”Mario, AMD is a customer centric company. We always consult our customers who tell us what to do. In fact, I just called Dell to ask them what I should have for lunch today.”

“All of our customers told us that they prefer native quad cores to dual die dual core quad cores. They also told us that speed isn't important - 2 GHz will be just fine. In fact, 1.9 GHz will be peachy.”

“Our customers also said that being late to market with quad cores was OK - so we are late, slow and bogged down - because we are customer centric - we listen to our customers.”

“At least the few customers that we have left.”

Don’t forget the backstop
It seems evident to me that a three-pronged strategy - packaged CPU insert card, dual-die and native architectures - would have given AMD all the multi-core reach that it could handle.

AMD would have been first to market with every multi-core launch - dual-core, quad-core, octa-core, hexadeca-core and everything in between. The company’s product flexibility would have been very good as well. So if there was a delay of a particular design - quad-core comes to mind - the company would have had a dual-die version as cover.

The AMD quarterly financial report ends with a cautionary statement, which discusses the risks and uncertainties of its forward looking statements. AMD says in part, that, “Risks include the possibility that Intel Corporation’s pricing, marketing and rebating programs, product bundling, standard setting, new product introductions or other activities targeting the company’s business will prevent attainment of the company’s current plans”.

AMD was right in having a native quad-core strategy. But such a complex design required a backstop that the company didn’t have. AMD had a great opportunity to take the multi-core market by the horns, but its tunnel vision strategy didn’t allow that happen.

Since the chip maker got badly burned from its quad-core delays let’s just hope that the company has learned its backstop lesson.